At present, the global mainstream of a mobile communication environment is 2nd Generation (2G) digital systems supporting various multi modes. The 3rd Generation (3G) broadband International Mobile Telecommunications-2000 (IMT-2000) standard having sought single standardization for a global roaming service is mainly divided into North American 3rd Generation Partnership Project 2 (3GPP2) Code Division Multiple Access 2000 (CDMA2000) and European/Japanese 3rd Generation Partnership Project (3GPP) Wideband Code Division Multiple Access (W-CDMA) systems having different characteristics and is scheduled for local commercialization. Accordingly, a single chip technology based on a Complementary Metal-Oxide Semiconductor (CMOS) has been developed in recent years. Thus, a local oscillator available at several frequency bands is required and thus, its technological development is under way.
In order to generate high band frequency, the conventional art uses a Phase Locked Loop (PLL) local oscillator including a Voltage Controlled Oscillator (VCO) 101, a Phase Frequency Detector (PFD) 103, and a filter 105 as shown in FIG. 1. However, the PLL local oscillator has a disadvantage in that it is difficult to improve a noise characteristic because of a technological limitation of the PLL.
In recent years, a demand for a local oscillator having a better noise characteristic for application of various systems has been made. Accordingly, as shown in FIG. 2, various methods for generating high frequency using Delay Locked Loops (DLLs) 201 and 211 have been proposed. As shown in FIG. 2, at each transmit/receive end, a conventional communication system generates a reference frequency signal for converting a radio frequency (RF) signal into an intermediate frequency (IF) signal or converting an IF signal into an RF signal using the DLLs 201 and 211 and VCOs 203 and 213. The DLLs 201 and 211 delay a phase of an input signal. The VCOs 203 and 213 control oscillation frequencies through voltage control.
For example, a method for generating a desired frequency by selecting each of delay cells 311, 313, 315, and 317 within a DLL 300 through a multiplexer 301 as shown in FIG. 3, and a method (not shown) for generating various frequencies by installing two decoders for selecting a pulse and a part for making a fractional number in a part for selecting a delay cell within a DLL have been proposed.
However, in the method for generating a desired frequency by switching the delay cells (i.e., buffers) 311, 313, 315, and 317 using the multiplexer 301 as shown in FIG. 3, there is a problem in that a layout area is increased because of a need to use more buffers to generate various frequencies, and the noise characteristic deteriorates as the number of buffers increases due to a noise generated at each buffer.
In the method for generating various frequencies by installing the two decoders and the part for making a fractional number, because the frequency generated by switching each buffer is dependent on a delay time of each buffer, a randomization of a constant period is required to generate a frequency of a fractional multiple not an integer multiple of a desired frequency. Accordingly, this method can generate each frequency of a fractional multiple, but has a problem in that repeated switching causes the generation of a noise, thus deteriorating the entire noise characteristic.